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TTEP 2006
TEST TECHNOLOGY EDUCATIONAL PROGRAM 2006
Test Tutorials at DATE 2006
March 6-10, Munich, Germany

http://tab.computer.org/tttc/teg/ttep

FIRST CALL FOR TUTORIAL PROPOSALS
- Call for Tutorial Proposals for all other TTEP 2006 events will be announced shortly -

Scope -- Submission Information

Scope

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The Tutorials & Education Group (TEG) of the IEEE Computer Society Test Technology Technical Council (TTTC) organizes in 2006 a comprehensive set of Test Technology Tutorials to be held in conjunction with TTTC sponsored technical meetings. The objective of this call is to invite submissions for tutorial proposals in order to enable selecting the best fitted tutorials for each technical meeting, as part of the annual Test Technology Educational Program (TTEP). The tutorials accepted by the Program Committee will be
included in the Test Technology Educational Program, the intent of which is to serve the test and design professionals offering fundamental education and expert knowledge in state-of-the-art test technology topics. Participation in TTEP-organized tutorials is credited by IEEE Computer Society. Each full day tutorial corresponds to four TTEP units. Upon completion of each sixteen units official accreditation in the form of the “IEEE TTTC Test Technology Certificate” is presented to the participants.

This First Call for Tutorial Proposals invites half-day (3-hours) proposals for the Design Automation and Test in Europe Conference (DATE 2006), March 6-10, Munich, Germany.

The Call for Tutorial Proposals for all other TTEP 2006 events and corresponding deadlines will be
announced shortly.

TTEP accommodates a wide range of technical areas, from mature test topics of high interest to industrial test engineers to emerging test topics with emphasis on novelty. Topics of interest for year 2006 TTEP Tutorials include (but are not limited to):

  • Automatic test equipment
  • Board-level testing
  • Built-In Self-Test
  • Defect oriented testing
  • Design for testability
  • DFT testers
  • Diagnosis and debug
  • Embedded core testing
  • High-speed interface testing
  • Interconnect characterization
  • Memory testing
  • Mixed-Signal/Analog testing
  • Nanometer techn. testing
  • On-line and field testing
  • Performance/Delay testing
  • Power issues in testing
  • System-level testing
  • Test economics
  • Test synthesis
  • Test resource partitioning
  • Validation
  • Verification
  • Wafer testing
  • Yield optimization and test

Submission Information

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Submissions
All tutorial proposal submissions to TTEP 2006 are to be made electronically through the TTEP submissions website: http://cad.cs.unipi.gr/~ttep

Deadlines and key dates

October 14, 2005: Deadline for DATE 2006 test tutorial proposals.

November 25, 2005: Notification of acceptance for DATE 2006.

Contact Information

Dimitris Gizopoulos
TTEP Chair
University of Piraeus
T: +30 210 414 2372
F: +30 210 414 2264
E: dgizop@unipi.gr

Anand Raghunathan
TTEP Vice Chair (Organization)
NEC USA, C&C Research Labs
T: +1 609 951 2967
F: +1 609 951 2499
E: anand@nec-labs.com

Kaushik Roy
TTEP Vice Chair (Program)
Purdue University
T: +1 765 494-2361
F: +1 765 494-3371
E: kaushik@ecn.purdue.edu

TTEP central web site: http://tab.computer.org/tttc/teg/ttep

TTEP web site for submissions: http://cad.cs.unipi.gr/~ttep

For more information, visit us on the web at: http://tab.computer.org/tttc/teg/ttep

The Test Technology Educational Program 2006 (TTEP 2006) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).


IEEE Computer Society– Test Technology Technical Council

TTTC CHAIR
André IVANOV
University of British Columbia– Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

SENIOR PAST CHAIR
Yervant ZORIAN
Virage Logic– USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com


TTTC 2ND VICE CHAIR
Michel RENOVELL
LIRMM– France
Tel. +33 467 418 523
E-mail renovell@lirmm.fr

FINANCE CHAIR
Adit D. SINGH
Auburn University– USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

IEEE DESIGN & TEST EIC
Rajesh K. GUPTA
University of California, Irvine– USA
Tel. +1-949-824-8052
E-mail gupta@uci.edu

TECHNICAL MEETINGS
Cheng-Wen WU

National Tsing Hua Univ.– Taiwan
Tel. +886-3-573-1154
E-mail cww@computer.org

TECHNICAL ACTIVITIES
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica– Mexico
Tel.+52-22-470-517
E-mail champac@inaoep.mx

ASIA & SOUTH PACIFIC
Hideo FUJIWARA
Nara Inst. of Science and Technology– Japan
Tel. +81-74-372-5220
E-mail fujiwara@is.aist-nara.ac.jp

LATIN AMERICA
Marcelo LUBASZEWSKI
Federal Univ. of Rio Grande do Sul (UFRGS)– Brazil
Tel. +34-93-401-6603
E-mail luba@vortex.ufrgs.br

NORTH AMERICA
William R. MANN
Tel. +1-949-645-3294
E-mail william.mann@ieee.org

COMMUNICATIONS
Adit D. SINGH
Auburn University– USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Virage Logic, Inc.– USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

 

PAST CHAIR
Paolo PRINETTO
Politecnico di Torino– Italy
Tel. +39-011-564-7007
E-mail Paolo.Prinetto@polito.it

TTTC 1ST VICE CHAIR
Adit D. SINGH
Auburn University– USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

SECRETARY
Christian LANDRAULT
LIRMM– France
Tel. +33-4-674-18524
E-mail landrault@lirmm.fr

ITC GENERAL CHAIR
Rob AITKEN
Artisan Components– USA
Tel. +1-408-548-3297
E-mail aitken@artisan.com

TEST WEEK COORDINATOR
Yervant ZORIAN
Virage Logic, Inc.– USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

TUTORIALS AND EDUCATION
Dimitris GIZOPOULOS

Univ. of Piraeus– Greece
Tel. +30-210-414-2372
E-mail dgizop@unipi.gr

STANDARDS
Rohit KAPUR

Synopsys– USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

EUROPE
Joan FIGUERAS
Univ. Politècnica de Catalunya– Spain
Tel. +55-51-228-1633, Ext. 4830
E-mail figueras@eel.upc.es

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut– Lebanon
Tel. +961-1-341-952
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES
Michael NICOLAIDIS
iRoC Technologies– Greece
Tel. +33-4-381-20763
E-mail michael.nicolaidis@iroctech.com

ELECTRONIC MEDIA
Alfredo BENSO
Politecnico di Torino– Italy
Tel. +39-011-564-7080
E-mail alfredo.benso@polito.it


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